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A4402
where:
I OUT(av) is the average of both output currents,
I RIPPLE is the inductor ripple current, and
K is a guardband margin. The peak current in the switch is then:
I PEAK = I VALLEY + I RIPPLE . (8)
The valley current must be calculated so that, at the worst-case
ripple, the converter can still supply the required current to the
load. Further information on how to calculate the ripple current is
included in the Application Information section.
ENB  An active high input enables the device. When set low, the 
device enters sleep mode; all internal circuitry is disabled, and the
part draws a maximum of 1 μA.
Thermal Shutdown  When the device junction temperature, T J  ,
is sensed to be at T JTSD , a thermal shutdown circuit disables the
regulator output, protecting the A4402 from damage.
Power-on Reset Delay  The POR function monitors the V FB2
voltage and provides a signal that can be used to reset a DSP or
microcontroller. A POR event is triggered by either of the
Constant On-Time Buck Converter
With Integrated Linear Regulator
following conditions:
? V FB2  falls below its UVLO threshold. This occurs if the current 
limit on either regulator is exceeded, or if the switcher voltage
falls due to TSD.
? After a rising edge on the WDI input, the voltage on TSET 
reaches V TRIP .
An open drain output, through the NPOR pin, is provided to
signal a POR event to the DSP or microcontroller. The reset
occurs after an adjustable delay, t POR , set by an external capacitor
connected to the POR pin. The value of t POR is calculated using
the following formula:
t POR = 214 × 10 3 × C POR , (9)
where C POR is the value of the POR capacitor in farads, and t POR
is the POR time in seconds.
Shutdown The buck regulator will shutdown if one of the fol-
lowing conditions is present:
? TSD
? ENB falling edge
Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
10
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